1. Field of the Invention
The present invention relates to a method of manufacturing a wiring board used for a semiconductor device. More particularly, the present invention relates to a method of manufacturing a wiring board on which wiring, used for feeding electricity to conduct plating, is not required as it would be in the case where the wiring board is manufactured by utilizing electro plating.
2. Description of the Related Art
Conventionally, when a wiring board used for a semiconductor device is manufactured, for example, a large-sized board 1 made of resin, such as glass prepreg shown in FIG. 1A, is prepared. After matrix-shaped wiring patterns 5, corresponding to those for a plurality of wiring boards 3, have been simultaneously formed, the large-sized board 1 is cut along the predetermined cutting lines 7. In this way, individual wiring boards 3 are obtained.
Especially when the wiring patterns 5 are formed on the large-sized board 1 by the subtractive method (the tenting method), in the primary portion of the wiring pattern 5 such as a bonding pad, the plated wiring 9 for feeding electricity to short-circuit between the wiring patterns for conducting nickel plating or gold plating by the electro plating method is provided outside the wiring board 3 which is obtained by cutting. In this connection, FIG. 1B is an enlarged view of the wiring pattern 5 and the plating wiring 9 shown in FIG. 1A. Reference numeral 11 is a bonding pad, and reference numeral 13 is a through-hole.
In the case where electro plating is conducted, the large-sized board 1 is dipped in a plating solution (not shown), and the electrode (not shown) for plating is connected to the plating wiring 9 provided on the outer circumference of the large-sized board 1. The wiring pattern 5 is fed with electricity, so that electro plating of nickel or gold can be conducted in the necessary portion on the wiring pattern 5.
After the completion of electro plating, the large-sized board 1 is cut in a portion on the inside (a portion along the cutting line 7 shown by a broken line) of the plating wiring 9, and the individual wiring boards 3 are obtained. Therefore, on the wiring pattern 5 of the wiring board 3, the portion 15, which is necessary only for connecting with the plating wiring 9 and not necessary for transmitting an electric signal, exists from the through-hole 11 to the outer periphery of the wiring board 3.
As an example of the wiring board 3 described above, there is a wiring board, referred to as “BGA (Ball Grid Array)”, used for a semiconductor device. Referring to FIGS. 2A to 2G and FIGS. 3A to 3D, explanations will be made into a method of manufacturing a wiring board by the conventional subtractive method. Especially, explanations will be made into a method of manufacturing a wiring board 3 used for BGA in the order of the manufacturing process. FIG. 4A is a view showing BGA in which the thus manufactured wiring board 3 is used. In this connection, in FIGS. 2A to 2G and 3A to 3D, a method of manufacturing a wiring pattern forming method of the cross-sectional portion, which is indicated by reference mark X in FIG. 4A, is shown.
In FIG. 2A, first of all, the large laminated plate 10, both sides of which are covered with copper, which is made when pieces of copper foil 17, 17 are laminated on both sides of the resin board (glass prepreg board) 1, is prepared. On this large laminated plate 10, both sides of which are covered with copper, a plurality of wiring boards 3 shown in FIG. 1A are formed.
In FIG. 2B, through-holes 13 are formed at predetermined positions with a drill (not shown).
In FIG. 2C, the electroless plating layer 19 of copper is formed on all surfaces including the inner wall of the through-hole 13.
In FIG. 2D, electricity is fed through the electroless plating layer 19, so that the electro plating layer 21 of copper is formed on the electroless plating layer 19. In this way, the thickness of the plating layer necessary for forming the wiring pattern can be obtained.
In FIG. 2E, on the electro plating layer 21, a film-shaped etching resist, which is referred to as a dry resist film, is laminated. Exposure and development are conducted on the dry resist film, so that the resist pattern 23 corresponding to a predetermined wiring pattern can be formed.
In FIG. 2F, etching is conducted while the resist pattern 23 is being used as a mask, and the electrolytic copper plating layer 21, the electroless copper plating layer 19 and the copper foil 17, which are exposed from the resist pattern 23 and unnecessary for forming the wiring pattern, are removed so as to form the wiring pattern 5.
In FIG. 2G, the resist pattern 23 is removed. Due to this removal of the resist pattern 23, the wiring pattern 5 is exposed. This wiring pattern 5 is connected to the plating wiring 9 (FIGS. 1 and 2), which is formed simultaneously with the wiring pattern 5, via the connecting portion 5c of the wiring pattern 5. The wiring pattern 5 and the plating wiring 9 are connected to each other as shown in FIG. 1. In this connection, as shown in FIG. 1, this plating wiring 9 is formed on the large resin board 1 into a frame shape outside the cutting line 7 for obtaining a plurality of wiring boards 3. Before cutting, this plating wiring 9 is connected to the wiring patterns 5 of all of the plurality of wiring boards 3.
Next, in FIG. 3A, a solder resist is coated by printing, and the solder resist pattern 25 is formed by means of exposure and development. At this time, the solder resist pattern 25 is formed so that the predetermined portions such as a bonding pad 11 of the wiring pattern 5 and a pad (a joining portion of the solder ball) 31 for connecting with the outside can be exposed.
In FIG. 3B, electricity is fed through the plating wiring 9 (FIG. 1), and the electrolytic nickel plating 27 is conducted on the wire boding pad 11 and the pad 31 for connecting with the outside. Next, the electrolytic gold plating 29 is conducted. In this connection, FIG. 3C is a view obtained when FIG. 3B is viewed from top. However, the solder resist 25 is omitted in FIG. 3C. As shown in the drawing, at the time of electro plating of nickel and gold (Ni/Au), the wiring pattern 5 is short-circuited by the plating wiring 9.
In FIG. 3D, the large-sized board 1 is cut on the cutting lines 7 shown in FIGS. 3B and 3C, so that the individual wiring boards 3 can be obtained.
After that, the semiconductor element 33 is mounted on the wiring board 3, and the semiconductor element 33 and the wire bonding pad 11 are connected with each other by the bonding wire 35 and sealed by the resin 37. Further, when a solder ball 39 is joined to it, the semiconductor device (BGA) shown in FIG. 4a can be obtained. FIG. 4B is a view obtained when the wiring board indicated by reference mark X in FIG. 4A is viewed from top, wherein the sealing resin 37 and the solder resist 25 are omitted in FIG. 4B.
When the wiring board 3 shown in FIG. 4A, which was manufactured by the conventional subtractive method described above, is used, as illustrated in FIG. 4B, an unnecessary portion (the connecting portion 5c to the plating wiring) extending from the through-hole 13 to the outer periphery 7a of the wiring board 3, which has been cut off, is generated. A signal is reflected and noise is caused by this unnecessary portion 5c. Therefore, the electrical characteristic of this semiconductor device is deteriorated. When the plating wiring 9 and the connecting portion 5c described above are provided, an arrangement of the wiring pattern 5 is restricted by the plating wiring 9 and the connecting portion 5c. Therefore, it becomes difficult to arrange the wiring pattern 5 with high density.
In this connection, the official gazette of JP-A-2000-114412 discloses the prior art relating to the present invention. According to the prior art, the wiring pattern and the board are closely contacted with each other and further the wiring pattern is made fine and furthermore the solder resist and the conductor portion are closely contacted with each other. Therefore, when electro plating is conducted while a copper layer formed on the board face is being used as an electricity feeding layer and when the copper layer is etched while the resist pattern is being used as a mask, the wiring pattern is formed.
According to the wiring board manufactured by the conventional subtractive method described above, due to the necessity of feeding electricity for conducting electro plating, an unnecessary portion is generated on the wiring pattern. By this unnecessary portion, a signal is reflected and noise is generated. Therefore, the electrical characteristic of the semiconductor device is deteriorated, and further an arrangement of the wiring pattern is restricted. Accordingly, it becomes difficult to arrange the wiring pattern 5 with high density.